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# Synchronous Sequential Networks Analysis and Design

الكلية كلية الهندسة     القسم  الهندسة الكهربائية     المرحلة 4
أستاذ المادة ايهاب عبد الرزاق حسين محمد       16/12/2016 19:45:51
Synchronous Sequential Networks

A type of “Synchronous Sequential Networks” Sometimes referred to as Finite State Machines FSM

FSM

•Finite State Machines are systems that combine Combinational Logic Networks with Memory networks, i.e. flip-flops and are similar to the networks we have been looking at.

•The values of the outputs of the flip-flops are referred to as the state of the circuit.

• Under control of the clock signal, the flip-flop outputs change state as determined by the network inputs and the combinational logic that feeds the inputs of these flip-flops.

•In this way, the circuit output varies from one state to another.

There are Two Types of State Machines

•Mealy Machine (named after George Mealy) in ’50’s

•Moore Machine (named after Edward Moore who expanded on Mealy concept).

Mealy Machine

Input signals ARE applied to both the input circuits and the output circuits.

Moore Machine
Input signals ARE NOT applied to the output circuits

– only to the input circuit.

Operation

•To insure that only one transition, from one state to another state, takes place during one clock cycle, flip-flop’s must be EDGE TRIGGERED, and operate on either rising or falling edge.

•The output of the IFL (which is next state information) is formed by the input and current state of the memory

•Thus “state” changes depend on both Input and Present State signals.

•The output of the circuit is formed by either:

–Inputs and present state of flip-flop’s (Mealy)

–Present state of flip-flop’s (Moore)

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