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METHODS OF ANALYSIS

الكلية كلية الهندسة     القسم  الهندسة الكهربائية     المرحلة 1
أستاذ المادة أواب قاسم جمعة الذهب       09/07/2018 08:40:57
CHAPTER THREE
METHODS OF ANALYSIS
3.1 INTRODUCTION
Having understood the fundamental laws of circuit theory (Ohm’s law and Kirchhoff’s laws), we are now prepared to apply these laws to develop two powerful techniques for circuit analysis: nodal analysis, which is based on a systematic application of Kirchhoff’s current law (KCL), and mesh analysis, which is based on a systematic application of Kirchhoff’s voltage law (KVL). The two techniques are so important that this chapter should be regarded as the most important in the lectures.
3.2 NODAL ANALYSIS
Nodal analysis provides a general procedure for analyzing circuits using node voltages as the circuit variables. Choosing node voltages instead of element voltages as circuit variables is convenient and reduces the number of equations one must solve simultaneously. To simplify matters, we shall assume in this section that circuits do not contain voltage sources. Circuits that contain voltage sources will be analyzed in the next section.

We shall now explain and apply these three steps.
The first step in nodal analysis is selecting a node as the reference or datum node. The reference node is commonly called the ground since it is assumed to have zero potential. A reference node is indicated by any of the three symbols in Fig. 3.1. We shall always use the symbol in Fig. 3.1(b). Once we have selected a reference node, we assign voltage designations to non-reference nodes. Consider, for example, the circuit in Fig. 3.2(a). Node 0 is the reference node (v = 0), while nodes 1 and 2 are assigned voltages v1 and v2, respectively. Keep in mind that the node voltages are defined with respect to the reference node. As illustrated in Fig. 3.2(a), each node voltage is the voltage with respect to the reference node.

Figure 3.1 Common symbols for indicating a reference node.

Figure 3.2 Typical circuits for nodal analysis.
As the second step, we apply KCL to each non-reference node in the circuit. To avoid putting too much information on the same circuit, the circuit in Fig. 3.2(a) is redrawn in Fig. 3.2(b), where we now add i1, i2, and i3 as the currents through resistors R1, R2, and R3, respectively. At node 1, applying KCL gives
I1 = I2 + i1 + i2 (3.1)
At node 2,
I2 + i2 = i3 (3.2)
We now apply Ohm’s law to express the unknown currents i1, i2, and i3 in terms of node voltages.
Current flows from a higher potential to a lower potential in a resistor.
We can express this principle as
i = (v_higher – v_lower)/R (3.3)
Note that this principle is in agreement with the way we defined resistance in Chapter 2 (see Fig. 2.3). With this in mind, we obtain from Fig. 3.2(b),
i_1 = (v_1 – 0)/R_1 , or i1 = G1v1
i_2 = (v_1 – v_2)/R_2 , or i2 = G2 (v1 ? v2)
i_3 = (v_2 – 0)/R_3 , or i3 = G3v2 (3.4)
Substituting Eq. (3.4) in Eqs. (3.1) and (3.2) results, respectively, in
I_1 =I_2+ (v_1 )/R_1 +(v_1-v_2)/R_2 (3.5)
I_2+v_1- (v_2 )/R_2 =v_2/R_3 (3.6)
In terms of the conductances, Eqs. (3.5) and (3.6) become
I1 = I2 + G1v1 + G2 (v1 ? v2) (3.7)
I2 + G2 (v1 ? v2) = G3v2 (3.8)
The third step in nodal analysis is to solve for the node voltages. If we apply KCL to n?1 non-reference nodes, we obtain n?1 simultaneous equations such as Eqs. (3.5) and (3.6) or (3.7) and (3.8). For the circuit of Fig. 3.2, we solve Eqs. (3.5) and (3.6) or (3.7) and (3.8) to obtain the node voltages v1 and v2 using any standard method, such as the substitution method, the elimination method, Cramer’s rule, or matrix inversion. To use either of the last two methods, one must cast the simultaneous equations in matrix form. For example, Eqs. (3.7) and (3.8) can be cast in matrix form as
[?(G_1+G_2&?-G?_2@?-G?_2&G_2+G_3 )][?(v_1@v_2 )]=[?(I_1-I_2@I_2 )] (3.9)
which can be solved to get v1 and v2.
Example 3.1: Calculate the node voltages in the circuit shown in Fig. 3.3(a).
Solution:
Consider Fig. 3.3(b), where the circuit in Fig. 3.3(a) has been prepared for nodal analysis. Notice how the currents are selected for the application of KCL. Except for the branches with current sources, the labeling of the currents is arbitrary but consistent. (By consistent, we mean that if, for example, we assume that i2 enters the 4_resistor from the left-hand side, i2 must leave the resistor from the right-hand side.) The reference node is selected, and the node voltages v1 and v2 are now to be determined.



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