Multiprocessors Interconnection Networks - Part -1

A multiprocessor system consists of multiple processing units connected via some interconnection network plus the software needed to make the processing units work together. There are two major factors used to categorize such systems: the processing units themselves, and the interconnection network that ties them together. A number of communication styles exist for multiprocessing networks. These can be broadly classified according to the communication model as shared memory (single address space) versus message passing (multiple address spaces). Communication in shared memory systems is performed by writing to and reading from the global memory, while communication in message passing systems is accomplished via send and receive commands. In both cases, the
interconnection network plays a major role in determining the communication speed. In this chapter, we introduce the different topologies used for interconnecting multiple processors and memory modules. Two schemes are introduced, namely
static and dynamic interconnection networks. Static networks form all connections
when the system is designed rather than when the connection is needed. In a static
network, messages must be routed along established links. Dynamic interconnection
networks establish connections between two or more nodes on the fly as messages
are routed along the links. The hypercube, mesh, and k-ary n-cube topologies are
introduced as examples for static networks. The bus, crossbar, and multistage interconnection
topologies are introduced as examples for dynamic interconnection networks.
Our coverage in this chapter will conclude with a section on performance
evaluation and analysis of the different interconnection networks.